RUN 2B L1CAL MEETING MINUTES 16 December, 2004 Present o Fermilab M.Adams, T.Adams, S.Lammers, S.Rapisarda, A.Stone, N.Varelas, H.Weerts o MSU J.Biehl, D.Edmunds o Nevis H.Evans o Saclay D.Calvet o York W.Taylor Fermilab: TWG (S.Rapisarda/D.Edmunds) ------------- o TWG shipped to MSU last week o Set up at MSU went very well - very easy to use ! MSU: ADF v2 (D.Edmunds) ----------- o Boards back from fabrication - look ok o Being assembled today - will do x-ray and visual inspections after assembly - should have boards in hand in a couple of days o Ready to test as soon as boards arrive - Philippe's software is running - board control firmware + initial test firmware is ready Nevis: TAB/GAB (H.Evans) -------------- o TAB Firmware - still working on new synchronization and EM algo firmware - ADF pedestals (8 ADC counts per TT) now being subtracted before doing divides . note: will need to require that ICR TTs are sent to the TAB with pedestal=0 ==> easy to do at the ADF level o TAB/GAB assembly - 10 TABs & 3 GABs still being assembled o TAB-->DAQ test - tried last week - didn't work because of firmware version problem - will try again soon UIC: Cabling (A.Stone) ------------ o final cable interface document being worked on Simulation (S.Lammers) ---------- o next simulation meeting on Jan.7 Unpacking (T.Adams/W.Taylor) --------- o IOGEN objects created for Run IIb L1Cal by Roger Moore - can be put in simulation allowing Todd's unpacking to work - Wendy will work on getting this incorporated in the simulation Test System ----------- o Hardware will be ready in ~2 months, need to get code set up - need to look at over-sampled data, data stored in ADF for a full term, pulser, calibration, etc. - foresee that Rahmi Unalan and Peter Renkel will work on this o Status of hardware in the Test System - TAB/GAB: everything there except TAB/GAB crate . this is available at nevis and can be shipped out - ADF: VME crate back at MSU - more to be delivered soon - Splitter cards: 1 installed, 4 cables laid . these will be needed after first hardware integration tests