FERMILAB VRB CUSTOM J3 BACKPLANE 5/10/99 FILE EXTENSION FILE TYPE -------------- --------- *.TOP TOP LAYER *.BOT BOTTOM LAYER *.IN3 INNER TRACE LAYER 3 *.PWR POWER LAYER *.GND GROUND LAYER *.SMT SOLDERMASK TOP *.SMB SOLDERMASK BOTTOM *.SST SILKSCREEN TOP *.SSB SILKSCREEN BOTTOM *.DRD DRILL DRAWING *.DRL ASCII DRILL LIST *.NET GENERIC NETLIST *.TAP DRILL TAPE *.DTS DRILL TAPE SUMMARY We would like the trace layer stripline board impedance to be 50 ohms in respect to Layer 4 GND and Layer 6 GND. The dielectric thickness between the power plane and the ground plane should be 3 mils. The board thickness should be .195 (inches). The dielectric thickness can be adjusted between the top layer/layer 2 interspace and/or the layer3/layer4 interspace to achieve the .195" total board thickness. The following is the board setup. Top Layer: Top Component Layer with GND copper pour ---------------------------- Dielectric thickness to get .195" total thickness ////////////////////////// Layer 2: Inner Power Plane ---------------------------- 3 mils dielectric thickness ////////////////////////// Layer 3: Inner GND plane ---------------------------- Dielectric thickness to get .195" total thickness ////////////////////////// Layer 4: Inner GND plane ---------------------------- Dielectric thickness for 50 ohm inner 3 trace to GND //////////////////////// Layer 5: Inner 3, trace layer, 50 ohm stripline impedance ---------------------- Dielectric thickness for 50 ohm inner 3 trace to GND //////////////////////// Layer 6: Bottom Component layer with GND copper pour ---------------------------