The BLS inputs to each ADF are detailed here:

http://www.pa.msu.edu/hep/d0/ftp/run2b/l1cal/hardware/adf_2/cards_and_crates/adf_crate_card_layout.txt

Take two examples from crate M104.  

SLOT:     ETA RANGE:    PHI RANGE:

2         eta +1:+4     phi  1:4    

14        eta -1:-4     phi 17:20   

Each ADF has 16 channels, labelled in terms of offset from nominal eta
and phi.  The EM and HAD data for these 16 channels (32 total) are
sent as input to TAB, labelled as channels 0-31.  Taking the two slots
above as examples we have:

ADF      TAB         BLS SIGNALS
offset   channel     SLOT 2   SLOT 3  
eta phi  EM   HAD    eta phi  eta phi
0   0    0    1      +1  1    -1  1        
0   1    2    3      +1  2    -1  2        
0   2    4    5      +1  3    -1  3        
0   3    6    7      +1  4    -1  4        
1   0    8    9      +2  1    -2  1        
1   1    10   11     +2  2    -2  2        
1   2    12   13     +2  3    -2  3        
1   3    14   15     +2  4    -2  4        
2   0    16   17     +3  1    -3  1        
2   1    18   19     +3  2    -3  2        
2   2    20   21     +3  3    -3  3        
2   3    22   23     +3  4    -3  4        
3   0    24   25     +4  1    -4  1        
3   1    26   27     +4  2    -4  2         
3   2    28   29     +4  3    -4  3      
3   3    30   31     +4  4    -4  4      

Note that the offset is in the positive direction for positive eta, and the
negative direction for negative eta!

This means that the postive eta chips in the TAB (chips 0-4) have the lowest
eta first, while the negative eta chips (5-9) have the highest eta first!

This implies a different mapping of input channels to physical eta and phi.
For positive eta chips we have the following mapping of input EM,HAD
channels to eta and phi:

  8
  7      (OVERLAP REGION)
  6
P 5                6, 7   14,15  22,23  30,31
H 4                4, 5   12,13  20,21  28,29
I 3                2, 3   10,11  18,19  26,27
  2                0, 1    8, 9  16,17  24,25
  1
  0
     0      1      2      3      4      5      6      7      8
                         ETA

And for negavie chips:

  8
  7      (OVERLAP REGION)
  6
P 5                30,31 22,23  14,15  6, 7   
H 4                28,29 20,21  12,13  4, 5   
I 3                26,27 18,19  10,11  2, 3   
  2                24,25 16,17  8, 9   0, 1    
  1
  0
     0      1      2      3      4      5      6      7      8
                         ETA

And similarly for the inputs for the phi overlap regions.  The eta overlap
regions are communicated from TAB chip to TAB chip, so once this remapping
is accomplished at the input, no additional remapping is needed there.