ATLAS LAr FEB Schematics
Submitted for review 2001-SEP-20.
- Input Signal Connectors:
PS,
PS.gz,
png,
PNG,
Tiff.
- Top Slice:
PS,
PS.gz,
png,
PNG,
Tiff.
- Bottom Slice:
PS,
PS.gz,
png,
PNG,
Tiff.
- Trigger Sums:
PS,
PS.gz,
png,
PNG,
Tiff.
- ADCs:
PS,
PS.gz,
png,
PNG,
Tiff.
- Gain Selector 0-1:
PS,
PS.gz,
png,
PNG,
Tiff.
- Gain Selector 2-3:
PS,
PS.gz,
png,
PNG,
Tiff.
- Gain Selector 4-5:
PS,
PS.gz,
png,
PNG,
Tiff.
- Gain Selector 6-7:
PS,
PS.gz,
png,
PNG,
Tiff.
- Front-End-Link with SMUX:
PS.
- Front-End-Link with DMUX (OBSOLETE):
PS,
PS.gz,
png,
PNG,
Tiff.
- SCA Controller:
PS,
PS.gz,
png,
PNG,
Tiff.
- SCA control bus:
PS,
PS.gz,
png,
PNG,
Tiff.
- TTCrx:
PS,
PS.gz,
png,
PNG,
Tiff.
- Clock Fanout:
PS,
PS.gz,
png,
PNG,
Tiff.
- SPAC Configuration Controller:
PS,
PS.gz,
png,
PNG,
Tiff.
- Power Connector:
PS,
PS.gz,
png,
PNG,
Tiff.
- Front End Regulators:
PS,
PS.gz,
png,
PNG,
Tiff.
- Back End Regulators:
PS,
PS.gz,
png,
PNG,
Tiff.
- Voltage/Temperature Monitoring:
PS
- Testpoints:
PS,
PS.gz,
png,
PNG,
Tiff.
- Mounting Holes:
PS,
PS.gz,
png,
PNG,
Tiff.
Last modified: Thu Sep 20 21:35:54 EDT 2001
