Timing Analyzer report for glink_Rx_test
Wed Jul 27 07:45:11 2005
Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Settings
  3. Timing Analyzer Summary
  4. Clock Settings Summary
  5. Clock Setup: 'cp'
  6. Clock Setup: 'strbout'
  7. tsu
  8. tco
  9. tpd
 10. th
 11. Minimum tco
 12. Minimum tpd
 13. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2004 Altera Corporation
Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
support information,  device programming or simulation file,  and any other
associated  documentation or information  provided by  Altera  or a partner
under  Altera's   Megafunction   Partnership   Program  may  be  used  only
to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
other  use  of such  megafunction  design,  netlist,  support  information,
device programming or simulation file,  or any other  related documentation
or information  is prohibited  for  any  other purpose,  including, but not
limited to  modification,  reverse engineering,  de-compiling, or use  with
any other  silicon devices,  unless such use is  explicitly  licensed under
a separate agreement with  Altera  or a megafunction partner.  Title to the
intellectual property,  including patents,  copyrights,  trademarks,  trade
secrets,  or maskworks,  embodied in any such megafunction design, netlist,
support  information,  device programming or simulation file,  or any other
related documentation or information provided by  Altera  or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.



+----------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                               ;
+-------------------------------------------------------+--------------------+------+----+
; Option                                                ; Setting            ; From ; To ;
+-------------------------------------------------------+--------------------+------+----+
; Device name                                           ; EP1C6Q240C7        ;      ;    ;
; Timing Models                                         ; Production         ;      ;    ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;
; Number of paths to report                             ; 200                ;      ;    ;
; Run Minimum Analysis                                  ; On                 ;      ;    ;
; Use Minimum Timing Models                             ; Off                ;      ;    ;
; Report IO Paths Separately                            ; Off                ;      ;    ;
; Clock Analysis Only                                   ; Off                ;      ;    ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;
; Cut off read during write signal paths                ; On                 ;      ;    ;
; Cut off clear and preset signal paths                 ; On                 ;      ;    ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;
; Analyze latches as synchronous elements               ; Off                ;      ;    ;
+-------------------------------------------------------+--------------------+------+----+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                       ;
+------------------------------+-------+---------------+----------------------------------+---------------------------------------------------------------------------+------------------+------------+----------+--------------+
; Type                         ; Slack ; Required Time ; Actual Time                      ; From                                                                      ; To               ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+----------------------------------+---------------------------------------------------------------------------+------------------+------------+----------+--------------+
; Worst-case tsu               ; N/A   ; None          ; 5.742 ns                         ; d[0]                                                                      ; din[0]           ;            ; strbout  ; 0            ;
; Worst-case tco               ; N/A   ; None          ; 8.304 ns                         ; nolock_stored                                                             ; led2             ; strbout    ;          ; 0            ;
; Worst-case tpd               ; N/A   ; None          ; 12.146 ns                        ; linkrdy_n                                                                 ; led1             ;            ;          ; 0            ;
; Worst-case th                ; N/A   ; None          ; -2.876 ns                        ; g_error                                                                   ; error_reg        ;            ; strbout  ; 0            ;
; Worst-case Minimum tco       ; N/A   ; None          ; 6.516 ns                         ; reset                                                                     ; rst_n            ; cp         ;          ; 0            ;
; Worst-case Minimum tpd       ; N/A   ; None          ; 4.550 ns                         ; cp                                                                        ; optics_clk       ;            ;          ; 0            ;
; Clock Setup: 'strbout'       ; N/A   ; None          ; 219.35 MHz ( period = 4.559 ns ) ; parity[14]                                                                ; parity_error     ; strbout    ; strbout  ; 0            ;
; Clock Setup: 'cp'            ; N/A   ; None          ; 266.67 MHz ( period = 3.750 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3] ; glink_data_phase ; cp         ; cp       ; 0            ;
; Total number of failed paths ;       ;               ;                                  ;                                                                           ;                  ;            ;          ; 0            ;
+------------------------------+-------+---------------+----------------------------------+---------------------------------------------------------------------------+------------------+------------+----------+--------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                               ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; cp              ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; strbout         ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'cp'                                                                                                                                                                                                                                                                                                            ;
+-------+------------------------------------------------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period)                           ; From                                                                       ; To                                                                         ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A   ; 266.67 MHz ( period = 3.750 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 267.09 MHz ( period = 3.744 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 278.78 MHz ( period = 3.587 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 286.04 MHz ( period = 3.496 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 286.70 MHz ( period = 3.488 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 292.48 MHz ( period = 3.419 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 300.39 MHz ( period = 3.329 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 300.75 MHz ( period = 3.325 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 300.84 MHz ( period = 3.324 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 303.03 MHz ( period = 3.300 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 309.79 MHz ( period = 3.228 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 314.37 MHz ( period = 3.181 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; 318.78 MHz ( period = 3.137 ns )               ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; glink_data_phase                                                           ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; glink_data_phase                                                           ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[0]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[7]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[5]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[4]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[9]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[10] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[14] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[15] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[6]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[2]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[1]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[11] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[8]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[13] ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]  ; cp         ; cp       ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[12] ; cp         ; cp       ; None                        ; None                      ; None                    ;
+-------+------------------------------------------------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'strbout'                                                                                                                                                                                                                                                                                                 ;
+-------+------------------------------------------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period)                           ; From                                                                    ; To                                                                      ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A   ; 219.35 MHz ( period = 4.559 ns )               ; parity[14]                                                              ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 229.62 MHz ( period = 4.355 ns )               ; parity[9]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 232.18 MHz ( period = 4.307 ns )               ; parity[2]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 236.29 MHz ( period = 4.232 ns )               ; parity[6]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 236.85 MHz ( period = 4.222 ns )               ; din[1]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 239.46 MHz ( period = 4.176 ns )               ; din[8]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 240.33 MHz ( period = 4.161 ns )               ; din[0]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 246.00 MHz ( period = 4.065 ns )               ; parity[1]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 246.67 MHz ( period = 4.054 ns )               ; din[10]                                                                 ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 252.08 MHz ( period = 3.967 ns )               ; din[6]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 253.68 MHz ( period = 3.942 ns )               ; parity[3]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 254.45 MHz ( period = 3.930 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 255.75 MHz ( period = 3.910 ns )               ; parity[8]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 256.74 MHz ( period = 3.895 ns )               ; parity[10]                                                              ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 257.07 MHz ( period = 3.890 ns )               ; din[15]                                                                 ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 257.60 MHz ( period = 3.882 ns )               ; parity[13]                                                              ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 257.73 MHz ( period = 3.880 ns )               ; parity[0]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 263.57 MHz ( period = 3.794 ns )               ; parity[4]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 265.89 MHz ( period = 3.761 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 269.40 MHz ( period = 3.712 ns )               ; din[14]                                                                 ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 272.78 MHz ( period = 3.666 ns )               ; parity[15]                                                              ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 275.03 MHz ( period = 3.636 ns )               ; din[13]                                                                 ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 275.18 MHz ( period = 3.634 ns )               ; din[2]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 276.47 MHz ( period = 3.617 ns )               ; parity[11]                                                              ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 278.63 MHz ( period = 3.589 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 281.69 MHz ( period = 3.550 ns )               ; din[4]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 281.93 MHz ( period = 3.547 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 285.55 MHz ( period = 3.502 ns )               ; parity[7]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 286.62 MHz ( period = 3.489 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 289.27 MHz ( period = 3.457 ns )               ; lpw_enable                                                              ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 295.86 MHz ( period = 3.380 ns )               ; din[11]                                                                 ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 297.89 MHz ( period = 3.357 ns )               ; parity[5]                                                               ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 300.84 MHz ( period = 3.324 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 301.39 MHz ( period = 3.318 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 309.41 MHz ( period = 3.232 ns )               ; din[3]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 312.30 MHz ( period = 3.202 ns )               ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; 312.40 MHz ( period = 3.201 ns )               ; parity[12]                                                              ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[9]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[12]                                                                 ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[7]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[5]                                                                  ; parity_error                                                            ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; lpw_enable                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[6]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[0]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[8]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[14]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[2]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity_error                                                            ; par_error_mem                                                           ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[1]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[9]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[7]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[15]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[7]                                                               ; parity[7]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[8]                                                                  ; parity[8]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[11]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[6]                                                               ; parity[6]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[12]                                                              ; parity[12]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[12]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[3]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[12]                                                                 ; parity[12]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[7]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[5]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[10]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[15]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[8]                                                               ; parity[8]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[10]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[12]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[11]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[3]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[5]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[13]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; dav_reg                                                                 ; parity[4]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[2]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[14]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[6]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[8]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[0]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[7]                                                                  ; parity[7]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[5]                                                                  ; parity[5]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[11]                                                              ; parity[11]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[15]                                                                 ; parity[15]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[3]                                                                  ; parity[3]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[10]                                                                 ; parity[10]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[0]                                                               ; parity[0]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[4]                                                               ; parity[4]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[13]                                                              ; parity[13]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[2]                                                               ; parity[2]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[15]                                                              ; parity[15]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[14]                                                                 ; parity[14]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[3]                                                               ; parity[3]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[9]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[4]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[13]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpw_enable                                                              ; parity[1]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[0]                                                                  ; parity[0]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[6]                                                                  ; parity[6]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; lpm_counter:p_word_cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[10]                                                              ; parity[10]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[2]                                                                  ; parity[2]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[14]                                                              ; parity[14]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[5]                                                               ; parity[5]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[9]                                                                  ; parity[9]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[1]                                                                  ; parity[1]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[13]                                                                 ; parity[13]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[11]                                                                 ; parity[11]                                                              ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; din[4]                                                                  ; parity[4]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[1]                                                               ; parity[1]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
; N/A   ; Restricted to 320.10 MHz ( period = 3.124 ns ) ; parity[9]                                                               ; parity[9]                                                               ; strbout    ; strbout  ; None                        ; None                      ; None                    ;
+-------+------------------------------------------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+---------------------------------------------------------------------------+
; tsu                                                                       ;
+-------+--------------+------------+------------+---------------+----------+
; Slack ; Required tsu ; Actual tsu ; From       ; To            ; To Clock ;
+-------+--------------+------------+------------+---------------+----------+
; N/A   ; None         ; 5.742 ns   ; d[0]       ; din[0]        ; strbout  ;
; N/A   ; None         ; 5.704 ns   ; linkrdy_n  ; nolock_stored ; strbout  ;
; N/A   ; None         ; 5.327 ns   ; d[2]       ; din[2]        ; strbout  ;
; N/A   ; None         ; 5.305 ns   ; d[8]       ; din[8]        ; strbout  ;
; N/A   ; None         ; 5.301 ns   ; d[6]       ; din[6]        ; strbout  ;
; N/A   ; None         ; 5.202 ns   ; new_test_n ; new_test      ; cp       ;
; N/A   ; None         ; 5.079 ns   ; d[1]       ; din[1]        ; strbout  ;
; N/A   ; None         ; 5.026 ns   ; d[7]       ; din[7]        ; strbout  ;
; N/A   ; None         ; 5.021 ns   ; d[3]       ; din[3]        ; strbout  ;
; N/A   ; None         ; 5.021 ns   ; d[9]       ; din[9]        ; strbout  ;
; N/A   ; None         ; 5.021 ns   ; d[4]       ; din[4]        ; strbout  ;
; N/A   ; None         ; 5.018 ns   ; d[5]       ; din[5]        ; strbout  ;
; N/A   ; None         ; 4.931 ns   ; reset_n    ; reset         ; cp       ;
; N/A   ; None         ; 4.693 ns   ; d[10]      ; din[10]       ; strbout  ;
; N/A   ; None         ; 4.663 ns   ; d[13]      ; din[13]       ; strbout  ;
; N/A   ; None         ; 4.652 ns   ; d[11]      ; din[11]       ; strbout  ;
; N/A   ; None         ; 4.640 ns   ; d[12]      ; din[12]       ; strbout  ;
; N/A   ; None         ; 4.527 ns   ; d[14]      ; din[14]       ; strbout  ;
; N/A   ; None         ; 4.401 ns   ; dav_n      ; dav_reg       ; strbout  ;
; N/A   ; None         ; 3.884 ns   ; d[15]      ; din[15]       ; strbout  ;
; N/A   ; None         ; 3.540 ns   ; cav_n      ; cav_reg       ; strbout  ;
; N/A   ; None         ; 3.401 ns   ; d[17]      ; din[17]       ; strbout  ;
; N/A   ; None         ; 3.401 ns   ; ff         ; ff_reg        ; strbout  ;
; N/A   ; None         ; 3.400 ns   ; d[18]      ; din[18]       ; strbout  ;
; N/A   ; None         ; 3.399 ns   ; d[16]      ; din[16]       ; strbout  ;
; N/A   ; None         ; 3.393 ns   ; d[19]      ; din[19]       ; strbout  ;
; N/A   ; None         ; 2.941 ns   ; flag       ; flag_reg      ; strbout  ;
; N/A   ; None         ; 2.922 ns   ; g_error    ; error_reg     ; strbout  ;
+-------+--------------+------------+------------+---------------+----------+


+--------------------------------------------------------------------------+
; tco                                                                      ;
+-------+--------------+------------+---------------+---------+------------+
; Slack ; Required tco ; Actual tco ; From          ; To      ; From Clock ;
+-------+--------------+------------+---------------+---------+------------+
; N/A   ; None         ; 8.304 ns   ; nolock_stored ; led2    ; strbout    ;
; N/A   ; None         ; 8.101 ns   ; din[17]       ; nu      ; strbout    ;
; N/A   ; None         ; 8.021 ns   ; parity_error  ; tp2     ; strbout    ;
; N/A   ; None         ; 7.817 ns   ; error_reg     ; nu      ; strbout    ;
; N/A   ; None         ; 7.667 ns   ; flag_reg      ; nu      ; strbout    ;
; N/A   ; None         ; 7.597 ns   ; din[16]       ; nu      ; strbout    ;
; N/A   ; None         ; 7.430 ns   ; par_error_mem ; led3    ; strbout    ;
; N/A   ; None         ; 7.393 ns   ; cav_reg       ; nu      ; strbout    ;
; N/A   ; None         ; 7.246 ns   ; new_test      ; g1rst_n ; cp         ;
; N/A   ; None         ; 7.199 ns   ; din[18]       ; nu      ; strbout    ;
; N/A   ; None         ; 7.163 ns   ; ff_reg        ; nu      ; strbout    ;
; N/A   ; None         ; 7.070 ns   ; reset         ; g1rst_n ; cp         ;
; N/A   ; None         ; 6.696 ns   ; din[19]       ; nu      ; strbout    ;
; N/A   ; None         ; 6.516 ns   ; reset         ; rst_n   ; cp         ;
+-------+--------------+------------+---------------+---------+------------+


+----------------------------------------------------------------------+
; tpd                                                                  ;
+-------+-------------------+-----------------+-----------+------------+
; Slack ; Required P2P Time ; Actual P2P Time ; From      ; To         ;
+-------+-------------------+-----------------+-----------+------------+
; N/A   ; None              ; 12.146 ns       ; linkrdy_n ; led1       ;
; N/A   ; None              ; 11.409 ns       ; linkrdy_n ; tp4        ;
; N/A   ; None              ; 11.057 ns       ; dav_n     ; tp3        ;
; N/A   ; None              ; 10.635 ns       ; dav_n     ; led4       ;
; N/A   ; None              ; 4.615 ns        ; strbout   ; tp1        ;
; N/A   ; None              ; 4.550 ns        ; cp        ; optics_clk ;
+-------+-------------------+-----------------+-----------+------------+


+---------------------------------------------------------------------------------+
; th                                                                              ;
+---------------+-------------+-----------+------------+---------------+----------+
; Minimum Slack ; Required th ; Actual th ; From       ; To            ; To Clock ;
+---------------+-------------+-----------+------------+---------------+----------+
; N/A           ; None        ; -2.876 ns ; g_error    ; error_reg     ; strbout  ;
; N/A           ; None        ; -2.895 ns ; flag       ; flag_reg      ; strbout  ;
; N/A           ; None        ; -3.347 ns ; d[19]      ; din[19]       ; strbout  ;
; N/A           ; None        ; -3.353 ns ; d[16]      ; din[16]       ; strbout  ;
; N/A           ; None        ; -3.354 ns ; d[18]      ; din[18]       ; strbout  ;
; N/A           ; None        ; -3.355 ns ; d[17]      ; din[17]       ; strbout  ;
; N/A           ; None        ; -3.355 ns ; ff         ; ff_reg        ; strbout  ;
; N/A           ; None        ; -3.494 ns ; cav_n      ; cav_reg       ; strbout  ;
; N/A           ; None        ; -3.838 ns ; d[15]      ; din[15]       ; strbout  ;
; N/A           ; None        ; -4.355 ns ; dav_n      ; dav_reg       ; strbout  ;
; N/A           ; None        ; -4.481 ns ; d[14]      ; din[14]       ; strbout  ;
; N/A           ; None        ; -4.594 ns ; d[12]      ; din[12]       ; strbout  ;
; N/A           ; None        ; -4.606 ns ; d[11]      ; din[11]       ; strbout  ;
; N/A           ; None        ; -4.617 ns ; d[13]      ; din[13]       ; strbout  ;
; N/A           ; None        ; -4.647 ns ; d[10]      ; din[10]       ; strbout  ;
; N/A           ; None        ; -4.885 ns ; reset_n    ; reset         ; cp       ;
; N/A           ; None        ; -4.972 ns ; d[5]       ; din[5]        ; strbout  ;
; N/A           ; None        ; -4.975 ns ; d[3]       ; din[3]        ; strbout  ;
; N/A           ; None        ; -4.975 ns ; d[9]       ; din[9]        ; strbout  ;
; N/A           ; None        ; -4.975 ns ; d[4]       ; din[4]        ; strbout  ;
; N/A           ; None        ; -4.980 ns ; d[7]       ; din[7]        ; strbout  ;
; N/A           ; None        ; -5.033 ns ; d[1]       ; din[1]        ; strbout  ;
; N/A           ; None        ; -5.156 ns ; new_test_n ; new_test      ; cp       ;
; N/A           ; None        ; -5.255 ns ; d[6]       ; din[6]        ; strbout  ;
; N/A           ; None        ; -5.259 ns ; d[8]       ; din[8]        ; strbout  ;
; N/A           ; None        ; -5.281 ns ; d[2]       ; din[2]        ; strbout  ;
; N/A           ; None        ; -5.658 ns ; linkrdy_n  ; nolock_stored ; strbout  ;
; N/A           ; None        ; -5.696 ns ; d[0]       ; din[0]        ; strbout  ;
+---------------+-------------+-----------+------------+---------------+----------+


+------------------------------------------------------------------------------------------+
; Minimum tco                                                                              ;
+---------------+------------------+----------------+---------------+---------+------------+
; Minimum Slack ; Required Min tco ; Actual Min tco ; From          ; To      ; From Clock ;
+---------------+------------------+----------------+---------------+---------+------------+
; N/A           ; None             ; 6.516 ns       ; reset         ; rst_n   ; cp         ;
; N/A           ; None             ; 6.696 ns       ; din[19]       ; nu      ; strbout    ;
; N/A           ; None             ; 7.070 ns       ; reset         ; g1rst_n ; cp         ;
; N/A           ; None             ; 7.163 ns       ; ff_reg        ; nu      ; strbout    ;
; N/A           ; None             ; 7.199 ns       ; din[18]       ; nu      ; strbout    ;
; N/A           ; None             ; 7.246 ns       ; new_test      ; g1rst_n ; cp         ;
; N/A           ; None             ; 7.393 ns       ; cav_reg       ; nu      ; strbout    ;
; N/A           ; None             ; 7.430 ns       ; par_error_mem ; led3    ; strbout    ;
; N/A           ; None             ; 7.597 ns       ; din[16]       ; nu      ; strbout    ;
; N/A           ; None             ; 7.667 ns       ; flag_reg      ; nu      ; strbout    ;
; N/A           ; None             ; 7.817 ns       ; error_reg     ; nu      ; strbout    ;
; N/A           ; None             ; 8.021 ns       ; parity_error  ; tp2     ; strbout    ;
; N/A           ; None             ; 8.101 ns       ; din[17]       ; nu      ; strbout    ;
; N/A           ; None             ; 8.304 ns       ; nolock_stored ; led2    ; strbout    ;
+---------------+------------------+----------------+---------------+---------+------------+


+------------------------------------------------------------------------------+
; Minimum tpd                                                                  ;
+---------------+-------------------+-----------------+-----------+------------+
; Minimum Slack ; Required P2P Time ; Actual P2P Time ; From      ; To         ;
+---------------+-------------------+-----------------+-----------+------------+
; N/A           ; None              ; 4.550 ns        ; cp        ; optics_clk ;
; N/A           ; None              ; 4.615 ns        ; strbout   ; tp1        ;
; N/A           ; None              ; 10.635 ns       ; dav_n     ; led4       ;
; N/A           ; None              ; 11.057 ns       ; dav_n     ; tp3        ;
; N/A           ; None              ; 11.409 ns       ; linkrdy_n ; tp4        ;
; N/A           ; None              ; 12.146 ns       ; linkrdy_n ; led1       ;
+---------------+-------------------+-----------------+-----------+------------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version
    Info: Processing started: Wed Jul 27 07:45:10 2005
Info: Command: quartus_tan --import_settings_files=off --export_settings_files=off glink_Rx_test -c glink_Rx_test --timing_analysis_only
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node cp is an undefined clock
    Info: Assuming node strbout is an undefined clock
Info: Clock cp has Internal fmax of 266.67 MHz between source register lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3] and destination register glink_data_phase (period= 3.75 ns)
    Info: + Longest register to register delay is 3.519 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X14_Y6_N5; Fanout = 4; REG Node = 'lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]'
        Info: 2: + IC(0.665 ns) + CELL(0.522 ns) = 1.187 ns; Loc. = LC_X14_Y6_N1; Fanout = 1; COMB Node = 'reduce_nor~110'
        Info: 3: + IC(1.059 ns) + CELL(0.101 ns) = 2.347 ns; Loc. = LC_X15_Y5_N8; Fanout = 1; COMB Node = 'reduce_nor~111'
        Info: 4: + IC(0.405 ns) + CELL(0.767 ns) = 3.519 ns; Loc. = LC_X15_Y5_N4; Fanout = 17; REG Node = 'glink_data_phase'
        Info: Total cell delay = 1.390 ns ( 39.50 % )
        Info: Total interconnect delay = 2.129 ns ( 60.50 % )
    Info: - Smallest clock skew is 0.000 ns
        Info: + Shortest clock path from clock cp to destination register is 2.547 ns
            Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_153; Fanout = 20; CLK Node = 'cp'
            Info: 2: + IC(0.619 ns) + CELL(0.629 ns) = 2.547 ns; Loc. = LC_X15_Y5_N4; Fanout = 17; REG Node = 'glink_data_phase'
            Info: Total cell delay = 1.928 ns ( 75.70 % )
            Info: Total interconnect delay = 0.619 ns ( 24.30 % )
        Info: - Longest clock path from clock cp to source register is 2.547 ns
            Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_153; Fanout = 20; CLK Node = 'cp'
            Info: 2: + IC(0.619 ns) + CELL(0.629 ns) = 2.547 ns; Loc. = LC_X14_Y6_N5; Fanout = 4; REG Node = 'lpm_counter:start_up_cnt_rtl_1|alt_counter_stratix:wysi_counter|safe_q[3]'
            Info: Total cell delay = 1.928 ns ( 75.70 % )
            Info: Total interconnect delay = 0.619 ns ( 24.30 % )
    Info: + Micro clock to output delay of source is 0.198 ns
    Info: + Micro setup delay of destination is 0.033 ns
Info: Clock strbout has Internal fmax of 219.35 MHz between source register parity[14] and destination register parity_error (period= 4.559 ns)
    Info: + Longest register to register delay is 4.328 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X14_Y7_N8; Fanout = 2; REG Node = 'parity[14]'
        Info: 2: + IC(0.659 ns) + CELL(0.522 ns) = 1.181 ns; Loc. = LC_X14_Y7_N7; Fanout = 1; COMB Node = 'reduce_or~120'
        Info: 3: + IC(0.974 ns) + CELL(0.101 ns) = 2.256 ns; Loc. = LC_X11_Y7_N9; Fanout = 1; COMB Node = 'reduce_or~121'
        Info: 4: + IC(0.379 ns) + CELL(0.522 ns) = 3.157 ns; Loc. = LC_X11_Y7_N1; Fanout = 1; COMB Node = 'process7~1'
        Info: 5: + IC(0.404 ns) + CELL(0.767 ns) = 4.328 ns; Loc. = LC_X11_Y7_N6; Fanout = 2; REG Node = 'parity_error'
        Info: Total cell delay = 1.912 ns ( 44.18 % )
        Info: Total interconnect delay = 2.416 ns ( 55.82 % )
    Info: - Smallest clock skew is 0.000 ns
        Info: + Shortest clock path from clock strbout to destination register is 2.549 ns
            Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_28; Fanout = 55; CLK Node = 'strbout'
            Info: 2: + IC(0.621 ns) + CELL(0.629 ns) = 2.549 ns; Loc. = LC_X11_Y7_N6; Fanout = 2; REG Node = 'parity_error'
            Info: Total cell delay = 1.928 ns ( 75.64 % )
            Info: Total interconnect delay = 0.621 ns ( 24.36 % )
        Info: - Longest clock path from clock strbout to source register is 2.549 ns
            Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_28; Fanout = 55; CLK Node = 'strbout'
            Info: 2: + IC(0.621 ns) + CELL(0.629 ns) = 2.549 ns; Loc. = LC_X14_Y7_N8; Fanout = 2; REG Node = 'parity[14]'
            Info: Total cell delay = 1.928 ns ( 75.64 % )
            Info: Total interconnect delay = 0.621 ns ( 24.36 % )
    Info: + Micro clock to output delay of source is 0.198 ns
    Info: + Micro setup delay of destination is 0.033 ns
Info: tsu for register din[0] (data pin = d[0], clock pin = strbout) is 5.742 ns
    Info: + Longest pin to register delay is 8.258 ns
        Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_2; Fanout = 1; PIN Node = 'd[0]'
        Info: 2: + IC(6.857 ns) + CELL(0.102 ns) = 8.258 ns; Loc. = LC_X14_Y7_N5; Fanout = 2; REG Node = 'din[0]'
        Info: Total cell delay = 1.401 ns ( 16.97 % )
        Info: Total interconnect delay = 6.857 ns ( 83.03 % )
    Info: + Micro setup delay of destination is 0.033 ns
    Info: - Shortest clock path from clock strbout to destination register is 2.549 ns
        Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_28; Fanout = 55; CLK Node = 'strbout'
        Info: 2: + IC(0.621 ns) + CELL(0.629 ns) = 2.549 ns; Loc. = LC_X14_Y7_N5; Fanout = 2; REG Node = 'din[0]'
        Info: Total cell delay = 1.928 ns ( 75.64 % )
        Info: Total interconnect delay = 0.621 ns ( 24.36 % )
Info: tco from clock strbout to destination pin led2 through register nolock_stored is 8.304 ns
    Info: + Longest clock path from clock strbout to source register is 2.547 ns
        Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_28; Fanout = 55; CLK Node = 'strbout'
        Info: 2: + IC(0.619 ns) + CELL(0.629 ns) = 2.547 ns; Loc. = LC_X15_Y5_N5; Fanout = 1; REG Node = 'nolock_stored'
        Info: Total cell delay = 1.928 ns ( 75.70 % )
        Info: Total interconnect delay = 0.619 ns ( 24.30 % )
    Info: + Micro clock to output delay of source is 0.198 ns
    Info: + Longest register to pin delay is 5.559 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X15_Y5_N5; Fanout = 1; REG Node = 'nolock_stored'
        Info: 2: + IC(3.680 ns) + CELL(1.879 ns) = 5.559 ns; Loc. = PIN_166; Fanout = 0; PIN Node = 'led2'
        Info: Total cell delay = 1.879 ns ( 33.80 % )
        Info: Total interconnect delay = 3.680 ns ( 66.20 % )
Info: Longest tpd from source pin linkrdy_n to destination pin led1 is 12.146 ns
    Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_57; Fanout = 3; PIN Node = 'linkrdy_n'
    Info: 2: + IC(8.968 ns) + CELL(1.879 ns) = 12.146 ns; Loc. = PIN_180; Fanout = 0; PIN Node = 'led1'
    Info: Total cell delay = 3.178 ns ( 26.16 % )
    Info: Total interconnect delay = 8.968 ns ( 73.84 % )
Info: th for register error_reg (data pin = g_error, clock pin = strbout) is -2.876 ns
    Info: + Longest clock path from clock strbout to destination register is 2.547 ns
        Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_28; Fanout = 55; CLK Node = 'strbout'
        Info: 2: + IC(0.619 ns) + CELL(0.629 ns) = 2.547 ns; Loc. = LC_X1_Y5_N7; Fanout = 1; REG Node = 'error_reg'
        Info: Total cell delay = 1.928 ns ( 75.70 % )
        Info: Total interconnect delay = 0.619 ns ( 24.30 % )
    Info: + Micro hold delay of destination is 0.013 ns
    Info: - Shortest pin to register delay is 5.436 ns
        Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_47; Fanout = 1; PIN Node = 'g_error'
        Info: 2: + IC(4.035 ns) + CELL(0.102 ns) = 5.436 ns; Loc. = LC_X1_Y5_N7; Fanout = 1; REG Node = 'error_reg'
        Info: Total cell delay = 1.401 ns ( 25.77 % )
        Info: Total interconnect delay = 4.035 ns ( 74.23 % )
Info: Minimum tco from clock cp to destination pin rst_n through register reset is 6.516 ns
    Info: + Shortest clock path from clock cp to source register is 2.551 ns
        Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_153; Fanout = 20; CLK Node = 'cp'
        Info: 2: + IC(0.623 ns) + CELL(0.629 ns) = 2.551 ns; Loc. = LC_X7_Y7_N5; Fanout = 2; REG Node = 'reset'
        Info: Total cell delay = 1.928 ns ( 75.58 % )
        Info: Total interconnect delay = 0.623 ns ( 24.42 % )
    Info: + Micro clock to output delay of source is 0.198 ns
    Info: + Shortest register to pin delay is 3.767 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X7_Y7_N5; Fanout = 2; REG Node = 'reset'
        Info: 2: + IC(1.902 ns) + CELL(1.865 ns) = 3.767 ns; Loc. = PIN_63; Fanout = 0; PIN Node = 'rst_n'
        Info: Total cell delay = 1.865 ns ( 49.51 % )
        Info: Total interconnect delay = 1.902 ns ( 50.49 % )
Info: Shortest tpd from source pin cp to destination pin optics_clk is 4.550 ns
    Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_153; Fanout = 20; CLK Node = 'cp'
    Info: 2: + IC(1.386 ns) + CELL(1.865 ns) = 4.550 ns; Loc. = PIN_73; Fanout = 0; PIN Node = 'optics_clk'
    Info: Total cell delay = 3.164 ns ( 69.54 % )
    Info: Total interconnect delay = 1.386 ns ( 30.46 % )
Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning
    Info: Processing ended: Wed Jul 27 07:45:11 2005
    Info: Elapsed time: 00:00:00


