/****************************************************************************/

/*
 *	m5235.h -- Motorola Coldfire 5235 CPU Support.
 *
 *  	Based on the /arch/5307/arch.h
 *	(C) Copyright 1999, Greg Ungerer (gerg@moreton.com.au)
 *
 *  	(C) Copyright 2003, Jeremy Andrus (jeremy@jeremya.com)
 * 	  Added 5249 support
 */

/****************************************************************************/
#ifndef	m5235_h
#define	m5235_h
/****************************************************************************/

/*
 *  Define master clock frequency of our 5235
 *  Note: These are exact values calculated from the PLLCR.
 *
 */
#define MCF_CLK		150000000  /* The next lower speed */
#define MCF_BUSCLK  MCF_CLK / 2

/*
 *  The MCF5249C3 board memory map is set up as follows:
 *
 *  0x00000000  --  SDRAM (operational memory - 4MB)
 *  0x10000000  --  MBAR1 (5249 SIM module peripherals)
 *  0x80000000  --  MBAR2 (5249 SIM module peripherals)
 *  0x20010000  --  RAMBAR0 (5249 internal SRAM - 32k)
 *  0x20000000  --  RAMBAR1 (5249 internal SRAM - 64k)
 *  0xffe00000  --  FLASH (32Mb) (CS0)
 *  0xe0000000  --  LAN (smc91c111 ethernet (CS1)
 */

#define MCF_MEMBASE     0x00000000
#define	MCF_IPSBAR	0x40000000
#define	MCF_MBAR	MCF_IPSBAR

#define	MCFUART_BASE1		0x200		/* Base address of UART1 */
#define	MCFUART_BASE2		0x240		/* Base address of UART2 */
#define MCFUART_BASE3		0x280		/* Base address of UART3 */

/*
 * useful definitions for reading/writing MBAR offset memory
 */
#define mbar_readLong(x)      *((volatile unsigned long *) (MCF_IPSBAR + x))
#define mbar_writeLong(x,y)   *((volatile unsigned long *) (MCF_IPSBAR + x)) = y
#define mbar_writeShort(x,y)  *((volatile unsigned short *) (MCF_IPSBAR + x)) = y
#define mbar_writeByte(x,y)   *((volatile unsigned char *) (MCF_IPSBAR + x)) = y


/*
 * Size of internal RAM
 */

#define INT_RAM_SIZE 65536  /* RAMBAR0 - 32k */

/*
 *	Define the 5235 SCM register set addresses.
 */

#define MCF_SYNCR		0x120000
#define MCF_CSAR0		0x80
#define MCF_CSMR0		0x84
#define	MCF_CSCR0		0x8a
#define MCF_CSAR1		0x8c
#define MCF_CSMR1		0x90
#define	MCF_CSCR1		0x96
#define	MCF_DCR			0x40
#define	MCF_DACR0		0x48
#define	MCF_DMR0		0x4C
#define MCF5235_WCR			0x140000

#define MCF5235_PAR_AD		*((volatile unsigned char *) (MCF_IPSBAR + 0x100040))
#define PAR_DATAL		0x01
#define	MCF5235_PAR_UART	*((volatile unsigned short *) (MCF_IPSBAR + 0x100048))
#define PAR_ENABLE_U1U2_TXRX 0x0F0C
#endif	/* m5235_h */