/*****************************************************************************/ /* * boot.S -- startup code for colilo * * Based on NETtel code: (C) Copyright 1999, Moreton Bay Ventures Pty Ltd. * Modifications: (C) Copyright 1999, Rob Scott * Modifications: (C) Copyright 2003, Jeremy Andrus * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /*****************************************************************************/ #include "arch.h" /* * MEM_BUILTIN - address to relocate on chip SRAM to. (Usually 8KB). * * NOTE: The 5249 has 32k + 64k of internal SRAM. ~Jeremy */ #ifdef __MCF5235__ #define MEM_BUILTIN 0x20000000 #else #define MEM_BUILTIN 0x20010000 #endif #ifdef __MCF5249__ #define MEM_BUILTIN2 0x20000000 #endif /*****************************************************************************/ .global _start .global _vectors .global _version .global _fault .global nop .global startimage .global disableCache .extern start_main .extern recover .extern xfer_addr /*****************************************************************************/ .text /* * Vector table. This is used for initial platform startup. * These vectors are to catch any un-intended traps. */ _vectors: /* The initial program counter is 0x04. The start address needs to be there */ #ifdef __MCF5235__ .long 0x20000000, _start #else .long 0x00000000, _start #endif .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault, _fault .long _fault, _fault, _fault, _fault, _fault, _fault, _fault /* * The very last vector position is stolen to use as a version * number for this boot code :-) */ _version: .long 0x03100000 /*****************************************************************************/ /* * This is the initial start up entry point. */ _start: nop // Filler move.w #0x2700, %sr // All interrupts off // Setup VBR, MBAR and RAMBAR first... move.l #_vectors, %d0 // Set VBR address (into FLASH) movec %d0, %VBR #ifndef __MCF5235__ move.l #(MCF_MBAR+1), %d0 // Get MBAR address movec %d0, %MBAR // Set MBAR #endif // The 5249 has MBAR2 as well #ifdef MCF_MBAR2 move.l #(MCF_MBAR2+1), %d0 // Get MBAR2 address movec %d0, #0xc0e // Set MBAR2 #endif #ifdef __MCF5235__ move.l #(MEM_BUILTIN+0x201),%d0 move.l %d0,(MCF_MBAR+0x08) move.l #(MEM_BUILTIN+0x201),%a0 #else move.l #MEM_BUILTIN+0x1,%a0 // Set SRAM base addr #endif movec %a0, %RAMBAR0 // Note: bit 0 is Validate move.l #MEM_BUILTIN+INT_RAM_SIZE, %a7 // Stack in internal SRAM // The 5249 has two banks of built-in SRAM #ifdef MEM_BUILTIN2 move.l #MEM_BUILTIN2+0x1,%a0 // Set SRAM base addr movec %a0, %RAMBAR1 // Note: bit 0 is Validate move.l #MEM_BUILTIN2+INT_RAM_SIZE2, %a7 // Move stack to larger SRAM bank #endif /* * Disable the cache. Don't want it on just yet. */ jsr disableCache /* * Most of the setup work is done in main(). */ jsr start_main /* * Should never get here! */ forever: jmp forever /****************************************************************************/ nop: nop /* Small delay */ rts /****************************************************************************/ /* * Jump into the image copied into RAM. */ startimage: //disable interrupts ~IAS move.l #0x00002700, %d0 move %d0, %sr //disable vbr ~IAS move.l #0x0, %d0 // Set VBR address (into FLASH) movec %d0, %VBR //Enable interrupts ~IAS move.l #0x00002000, %d0 move %d0, %sr jsr disableCache //Who ever is running next should figure out if they want cache. ~IAS move.l xfer_addr,%a0 jmp (%a0) /* Jump to code start address */ /****************************************************************************/ /* * Disable the CPU CACHE. */ disableCache: move.l #0x00000400, %d0 /* Disable and invalidate cache */ movec %d0, %CACR /* This takes 31 machine cycles */ move.l #0x00008020, %d0 /* Completely disable cache */ movec %d0, %ACR0 movec %d0, %ACR1 rts /****************************************************************************/ /* * Local fault routine. Shouldn't never get here. If we ever do then * the boot up process has gone badly wrong. Enter the serial port * download state (blinking LEDs so operator knows something is up). * * It is possible that the stack pointer is bad, so we will set it * back to a sane value here too. */ _fault: move.l #MEM_BUILTIN+INT_RAM_SIZE, %a7 /* Reset stack to local SRAM */ jsr recover /* Let recover clean up */ jmp _start /* Should never get here */ /****************************************************************************/