//exp/microboone/study2010/study_dataout?100414/  march15,2011
//compressed and buffered output-link data:

module  b_dataout (clk128,clock_source, init,nocomp,mod,id,max,
blklst,blocknumber,channel,datin,fstin,lstin,davin,
blk_err,flg, resetn,resetuser,memrdy,
send,accept,hold,linkdat,linkdav,linkfst,linklst,
mem_addr,mem_ba,mem_cas_n,mem_cke,mem_clk,mem_clk_n,
mem_cs_n,mem_dm,mem_dq,mem_dqs,mem_ras_n,mem_we_n,
test,rd_hed,rd_buf
);
input         init;
input         clk128;
input         clock_source;  //16mhz
input  [4:0]  mod;      //mod#        to link
input  [6:0]  id;       //ev_id       to link
input         nocomp;   //nocompress  to compressor
input  [13:0] max;      //max rdusedw to prebuffer
input  [1:0]  flg;      //data[31-30] to buffer
output        blk_err;  //blkerr    from prebuffer

input         resetn;   //reset_n      to buffer
input         resetuser;
output        memrdy;   //mem_local_init_done

//compressor connections:
input         blklst;      //blklst   to compressor
input  [23:0] blocknumber; //block#   to compressor
input  [5:0]  channel;     //channel# to compressor
input  [15:0] datin;       //data     to compressor
input         fstin;       //fst      to cpmpressor
input         lstin;       //lst      to compressor
input         davin;       //dav      to compressor

//link connections:
input         send;      //send     from linlio
input         accept;    //accept   from linkio
input         hold;      //hold     from linkio
output [31:0] linkdat;   //data       to linkio
output        linkdav;   //dav        to linkio
output        linkfst;   //fst        to linkio
output        linklst;   //lst        to linlio

//ddrbuffer port;
output  [ 12: 0] mem_addr;
output  [  1: 0] mem_ba;
output           mem_cas_n;
output  [  0: 0] mem_cke;
inout   [  0: 0] mem_clk;
inout   [  0: 0] mem_clk_n;
output  [  0: 0] mem_cs_n;
output  [  1: 0] mem_dm;
inout   [ 15: 0] mem_dq;
inout   [  1: 0] mem_dqs;
output           mem_ras_n;
output           mem_we_n;
//monitor:
input    test;
input    rd_hed;
input    rd_buf;

//compressor:
wire         hamdav;
wire         hamfst;
wire         hamlst;
wire  [29:0] hamdat;

wire  [7:0]  blkout;
wire  [23:0] eventnumber;
wire  [23:0] framenumber;
wire  [23:0] wordcount;
wire  [23:0] checksum;
wire         heddav;

compressor_100227 compression (
.clk128(clk128),
.init(init),
.nocomp(nocomp),
.blklst(blklst),
.blocknumber(blocknumber),
.channel(channel),
.datin(datin),
.fstin(fstin),
.lstin(lstin),
.davin(davin),
.davout(hamdav),
.fstout(hamfst),
.lstout(hamlst),
.datout(hamdat),
.blkout(blkout),
.eventnumber(eventnumber),
.framenumber(framenumber),
.wordcount(wordcount),
.checksum(checksum),
.heddav(heddav)
);

//link_100301  link:
wire          bufrdy;
wire  [31:0]  bufdat;
wire          bufdav;
wire          buflst;
wire          rdbuf;
wire          skip;
wire  [7:0]   linkblk;
wire  [31:0]  linkdat;
wire          linkdav;
wire          linkfst;
wire          linklst;
wire          buf_err;
wire          phy_clk;

link_3  link (
.clk128(clk128),
.clk(phy_clk),
.init(init),
.mod(mod),
.id(id),
.send(send),
.accept(accept),
.eventnumber(eventnumber),
.framenumber(framenumber),
.wordcount(wordcount),
.checksum(checksum),
.heddav(heddav),
.bufrdy(bufrdy),
.rdbuf(rdbuf),
.skip(skip),
.linkblk(linkblk),
.bufdat(bufdat),
.bufdav(bufdav),
.buflst(buflst),
.datout(linkdat),
.davout(linkdav),
.fstout(linkfst),
.lstout(linklst),

.test(test),
.rd_hed(rd_hed),
.rd_buf(rd_buf)
);

//prebuffer:
wire  [29:0] data;
wire         rdempty;
wire         wr;
wire         rd;
wire  [23:0] firstadd;
wire  [23:0] wraddress;
wire  [22:0] wdcount;
wire         empty;
wire         blk_err;
wire         gtmax;
wire         memrdy;

assign  bufrdy = memrdy & !empty;

pre_buffer  prebuffer (
.init(init),
.clk128(clk128),
.clk(phy_clk),
.datin(hamdat),
.lstin(hamlst),
.fstin(hamfst),
.davin(hamdav),
.blkin(blkout),
.data(data),
.rdempty(rdempty),
.max(max),
.gtmax(gtmax),
.wr(wr),
.wraddress(wraddress),
.rd(rd),
.skip(skip),
.firstadd(firstadd),
.wdcount(wdcount),
.empty(empty),
.linkblk(linkblk),
.blkerr(blk_err)
);

//ddrbuffer mt46v16m16:


my_avtop3_1129  b_ddrbuffer (
 //global i/o
.clock_source          (clock_source),
.reset_n               (!resetn),///????power reset
.usr_reset_n           (!resetuser),///only resets user logic

 //ddr i/o 
.mem_addr(mem_addr),
.mem_ba(mem_ba),
.mem_cas_n(mem_cas_n),
.mem_cke(mem_cke),
.mem_clk(mem_clk),
.mem_clk_n(mem_clk_n),
.mem_cs_n(mem_cs_n),
.mem_dm(mem_dm),
.mem_dq(mem_dq),
.mem_dqs(mem_dqs),
.mem_ras_n(mem_ras_n),
.mem_we_n(mem_we_n),

 //local i/o
.mem_local_init_done     (memrdy),  //buffer in user state
.mem_local_rdata_valid   (bufdav),
.mem_local_rdata         (bufdat),
.reset_request_n         (),            //?
//.mem_local_read_req(),       //not used here
//.mem_local_ready(),          //not used here

.token_ack(),                 //?
.phy_clk(phy_clk),            ///io clock output 
.reset_phy_clk_n(),           ///not used, leave with open bracket
  
 //i/o to prebuf and link
.wd_in({flg,data}),           //wfifo_q = {lst,fst,data[29:0]}
.read_firstaddress(firstadd), //from pre_buffer
.wfifo_gtmax(gtmax),
.wfifo_rdempty(rdempty),
.wfifo_rdreq(wr),             //to pre_buf
.pointer_rdreq(rd),           //to pre_buf
.wd_waddr(wraddress),
.wfifo_wdcount(wdcount),
.rdbuf(rdbuf),                //as token to driver
.buflst(buflst),              //eob
.hold(hold)
);




endmodule