--a_graycounter DEVICE_FAMILY="Stratix III" PVALUE=1 WIDTH=4 clock cnt_en q ALTERA_INTERNAL_OPTIONS=suppress_da_rule_internal=S102 --VERSION_BEGIN 9.1SP2 cbx_a_gray2bin 2010:03:24:20:38:24:SJ cbx_a_graycounter 2010:03:24:20:38:24:SJ cbx_cycloneii 2010:03:24:20:38:24:SJ cbx_mgl 2010:03:24:21:00:10:SJ cbx_stratix 2010:03:24:20:38:24:SJ cbx_stratixii 2010:03:24:20:38:24:SJ VERSION_END -- Copyright (C) 1991-2010 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any output files from any of the foregoing -- (including device programming or simulation files), and any -- associated documentation or information are expressly subject -- to the terms and conditions of the Altera Program License -- Subscription Agreement, Altera MegaCore Function License -- Agreement, or other applicable license agreement, including, -- without limitation, that your use is for the sole purpose of -- programming logic devices manufactured by Altera and sold by -- Altera or its authorized distributors. Please refer to the -- applicable agreement for further details. --synthesis_resources = reg 5 OPTIONS ALTERA_INTERNAL_OPTION = "suppress_da_rule_internal=S102;{-to counter7a0} POWER_UP_LEVEL=HIGH;{-to parity8} POWER_UP_LEVEL=LOW"; SUBDESIGN a_graycounter_b5c ( clock : input; cnt_en : input; q[3..0] : output; ) VARIABLE counter7a0 : dffeas WITH ( power_up = "high" ); counter7a1 : dffeas; counter7a2 : dffeas; counter7a3 : dffeas; parity8 : dffeas WITH ( power_up = "low" ); cntr_cout[3..0] : WIRE; parity_cout : WIRE; sclr : NODE; updown : NODE; BEGIN counter7a[3..0].clk = clock; counter7a[3..0].d = ( (counter7a[3].q $ cntr_cout[2..2]), (counter7a[2].q $ (counter7a[1].q & cntr_cout[1..1])), (counter7a[1].q $ (counter7a[0].q & cntr_cout[0..0])), ((cnt_en & (counter7a[0].q $ (! parity_cout))) # ((! cnt_en) & counter7a[0].q))); counter7a[3..0].sclr = sclr; parity8.clk = clock; parity8.d = ((cnt_en & (((counter7a[0..0].q $ counter7a[1..1].q) $ counter7a[2..2].q) $ counter7a[3..3].q)) # ((! cnt_en) & parity8.q)); parity8.sclr = sclr; cntr_cout[] = ( B"0", (cntr_cout[1..1] & (! counter7a[1].q)), (cntr_cout[0..0] & (! counter7a[0].q)), (cnt_en & parity_cout)); parity_cout = ((parity8.q $ updown) & cnt_en); q[] = counter7a[3..0].q; sclr = GND; updown = VCC; END; --VALID FILE