| Bits | FPGA Var | SlicDrive Var | Description |
| 31 | /fifoaf | --- | fifo almost full (low true) |
| 30 | --- | --- | unused |
| 29 | --- | --- | unused |
| 28 | holdbootreg | holdboot | holds off loading bootfile from fifo |
| 27 | flagin | dspflagin | flag from dsp serial port (flag_i) |
| 26 | flagoutreg | dspflagout | flag to dsp serial port (flag_o) |
| 25 | ext_int7reg | extdspint7 | interrupts dsp on rising edge |
| 24 | bselreg | bselmode | upper 2 bits of Data determine word to link or word to vme |
| 23 | send2olinkreg | send2olinkflag | forces dsp serial output to the link |
| 22 | send2vmereg | send2vmeflag | forces dsp serial output to the serial VME link |
| 21 | /resetdspserreg | resetser | reset for serial ports on DSP FPGA (low true) |
| 20 | /resetlinkreg | resetlink | reset for links on DSP FPGA (low true) |
| 19-15 | lookuptablereg | tablefordsp | DSP Identifier (used to match Director bits from link) |
| 14-10 | validindspserreg | valfordsp2link | Director bits used when dsp sends word to link |
| 9 | xindspserreg[1] | xfordsp2link[1] | C-bit (end of event) used when dsp sends to link |
| 8 | xindspserreg[0] | xfordsp2link[0] | P-bit (valid data) used when dsp sends to link |
| 7-5 | framefordspreg | framefordsp2ser | frame used when dsp sends data to vme |
| 4-2 | frameforstatusreg | frameforstat2ser | frame used when status returns to vme |
| 1 | /dpsresetreg | resetdsp | Reset fifo (low true) |
| 0 | /fifomrsreg | resetfifo | Reset fifo (low true) |