LINK FPGA SERIAL COMMANDS

Link FPGA Serial Commands

The link FPGAs control data motion from the input FPGAs to the link. Again their are two channels (A & B) per link FPGA.
See slic_link.tdf for FPGA code.

Command #		Data
A-Reg	B-Reg	Bits	Function	Value
Control Commands (R/W)
1	2	0	set/read PASS mode	1
		1-5	set/read DIRECTOR bits	V[1..5]
		6	set/read RESET link	0
		7	set/read LAST mode	1
Link/FIFO Status (R)
0	0	0	read TOKEN (link active)	1
		1	read FIFO /EF (empty flag)	0
		2	read HOLD (link busy)	1
Event Counter (R)
4	6	7-0	read EV_COUNT (lo byte)	count[7..0]
5	7	7-0	read EV_COUNT (hi byte)	count[15..8]