The status registers in the TAB and GAB FPGAs are updated continuously during normal running. They contain two different types of entries:
| Bit | Type | Description |
| TAB Chips 0-9 (stat.vhd) | ||
| 00..02 | latched | parity errors on input cables 1,2,3 |
| 03..05 | latched | data sync errors on input cables 1,2,3 |
| 06..08 | latched | BC mismatch on input cables 1,2,3 |
| 09 | latched | PLL lost lock |
| 10 | event | mode_ff |
| 11..13 | latched | PRN test data error on cables 1,2,3 |
| 14 | latched | serial data alignment error |
| 15 | event | PLL locked |
| TAB Chip 10 (flags.vhd) | ||
| 00 | event | testmode data |
| 01 | event | cp90 locked |
| 02 | event | cp53 locked |
| 03 | event | running |
| 04..15 | --- | unused |
| GAB LVDS Chips 1-4 (stat.vhd) | ||
| 00..01 | latched | parity errors on input cables 1,2 |
| 02 | latched | bc_error: XOR of BC error on two cables |
| 03 | latched | sync_error: XOR of serial data sync error on two cables |
| 04 | latched | valid_error: XOR of data not valid on two cables |
| 05 | latched | sclbc_error: XOR of chip10 BC error on two cables |
| 06 | latched | sclturn_error: XOR of Turn error on two cables |
| 07..08 | --- | unused |
| 09 | latched | pll_lock_error: XOR of PLL lock error on two cables |
| 10 | event | mode_ff |
| 11..14 | --- | unused |
| 15 | event | PLL locked |
| GAB S30 Chip (vhd_gabstatus.vhd) | ||
| 00 | event | init: initialized? |
| 01 | event | sclrun: running |
| 02 | event | locked: PLLs locked |
| 03 | latched | sclerror: SCL Init requested |
| 04..15 | --- | unused |