RUN 2B L1CAL MEETING MINUTES
			     27 June, 2002

Latency Discussion
------------------
o The detailed description of the ADF latency (from Denis) is now
  linked off of the agenda.
o Cal-Trk
  - with the "as is" L1Muon track-match system implemented for the
    Cal-Trk signals from the L1Cal must arrive at the Cal-Trk inputs
    at: 
    . BC + 1500 ns
    . this takes into account that the Cal-Trk will be in the MCH
      (instead of in the collision hall like the L1Muon)
      ==> we gain ~250 ns in transmission to the TFW
    . This number should be compared to is the "Serialize Ouptut" line
      in the TAB section of the spreadsheet (2344 ns)
  - Defecit = 2344 - 1500 ~ 800 ns
o Possible gains in Latency
  - Cal-Trk
    . do not use MTCM:          300 ns
    . speed up Cal-Trk logic:  ~132 ns
      > Cal-Trk logic is simpler than L1Muon track match
    . Total:                   ~432 ns
  - ADF
    . Total:                   ~2 BC (264 ns)
      > increase ADC sampling rate from 4xBC to 10xBC
      > changing position of output of filter wrt signal peak
    . note: speeding up the ADF arithmetic by using 8-parallel
      multipliers rather than 2 is disfavored
      > requires x2 more FPGAs
      > this would entail a much more complicated (and dangerous)
        board layout
  - TAB
    . Total:                   1-2 BC (132-264 ns)
      > this comes from taking the Cal-Trk signals directly from the
        Sliding Windows FPGAs - skipping the Ex,y calculation and
	reserialization steps.
      > some extra time will be needed to reformat the Cal-Trk data -
        so we should expect more like 1 BC of gain
o Pipeline Depth
  - could we increase this: new SVX has a depth of ~42
  - limiting factor likely to be Muon scintillators & PDTs
    . msc 4745 ns = 36 BC 
      (currently at 33 BCs + 1-2 unusable ==> 1-2 possible gain)
    . pdt 4783 ns
    . mdt 8304 ns
    . tradeoff is in timing resolution ==> background rej
    ===> talk w/ Boris about this
  - what if we don't put in the TRIP chip?
    . if stay at 396 - can get 3x132 pipeline depth
o BC -> ADF: 650 ns
  - drift time in calo + cables
  - all cables equalized (except BLS --> MCH)
    ==> SEC = shorter, NEC = longer (+30 ns)
    this is what leads to the 50 ns spread in signals at the ADF
  - this is not included in Denis' numbers
    . could be 50-91 ns
    . must be added to the latency
o Summary of Latency
  - Defecit:        -6 BC (800 ns)
  - Cal-Trk gain:    3 BC (432 ns)
  - Longer Pipeline: 1 BC (132 ns)
  - ADF mod's:       2 BC (take into account the signal synch above)
  - TAB mod's:       1 BC
                    -----
  - Total:          +1 BC (this is our safety margin)
  - Is this safety margin acceptable
    . In Run 2a the margin was 0 at design
  =====> Need to decide this during Oklahoma meeting


BASELINE
--------
o ADF
  - Backplane IO: connector or transition
    . as soon as crate arrives can study this (14 weeks)
    . crate compatible with both
    . not much influence
  - Channel Link mux/demux- OK
    . AMP hard metric cables: 10-pair, 3m --> 110 euros
      > much more expensive than anticipated
      > note 6-pairs much cheaper
  - L2/L3
    . send raw data over LVDS to TAB (10-bit) on L1accept
      > can be enabled/disabled
    . note: ADF suspends operation on receipt of monitoring L1Qual
      > read by VME --> deadtime
  - Timing for ADF
    . will make this fanout specifically for ADF system
    . options:
      > a) transition module (on backplane)
      > b) 6U card - possibly plugged into TAB crate
      > c) board not in crate - not prefered
    . broadcast of signals from SCL
      > use same cable as ADF to TAB - w/ custom protocol
        - allows programming timing card registers w/out slow controls
      > BC, L1Qual, Turn Marker, Reset, Busy, InitAck,
      > no BC or Turn 
    . each ADF will detect whether timing cable is plugged in

o Analog Splitter
  - PCB design made - almost ready for production
    . need Dan to look this over
    . need to get connectors
  - Cables to connect splitter to ADF
    . don't have these yet - where do we get them

o TAB
  - Sliding Windows algorithm
    . have chosen the 2,1,1 (Emmanuelle's notation) algorithm
      > RoI= 2x2, local max's separated by >= 2 TTs, 
        cluster energy = 4x4
    . will send 40x10 (eta x phi) TTs to each TAB
      > allows inclusion of ICR energy in jets
      > simplifies transmission to Cal-Trk
  - Timing distribution
    . will decide how this is to be done after implementation of new
      baseline algorithm

o Next L1Cal Collaboration Meeting
  - Sep 11-13 ==> not good for some people
  - Propose: Sep 18-20  in Paris
  *** Late Breaking News (1-Jul-02) ***
    . the Lehman review has been rescheduled to the week of 23 Sep
      in light of this, we need to reconsider the timing of our meeting.