RUN 2B L1CAL MEETING MINUTES
			     15 May, 2003

Present
o Fermilab:     G.Cancelo,V.Pavlicek, S.Rapisarda
o MSU:		
o Nevis:        H.Evans, J.Mitrevski, J.Parsons
o Northeastern: D.Wood
o Rice:         P.Padley
o Saclay:       J.Bystricky, D.Calvet


Status of the Data Pump: Stefano Rapisarda
-----------------------
Test Waveform Generator (Data Pump)
status May 15th, 2003
Stefano Rapisarda

Test Waveform Generator (TWG) project status:

1) Change of name from "Data Pump" to "Test Waveform Generator"

2) New web page as repository of info on the TWG project
   http://www-ese.fnal.gov/D0Cal_TWG/

3) General idea on the design (mother board, DAC cards, interface
   cards) and request for inputs/suggestions

4) Preliminary document (I'm still working on it and merging Gustavo
   and Vince ideas/documents in it).

o Will need information from Dan Edmunds
  - signal characteristics, etc.

o Prototype could be available fairly quickly (July/August)
  - not in time for initial ADF testing
  - Denis is currently using a standard waveform generator to test
    single ADF inputs
  - TWG could be used at Saclay to test multiple channels
    . cross-talk, etc.
    . higher frequency is less useful (analog filter on ADF input)
  - putting multiple channels on the prototype will make the design
    more complicated
  - Note: TWG should have (at least) 12-bit DAC to exceed 10 bit
    accuracy of ADF ADC


Status from Saclay: Denis Calvet
------------------

o Finished ADF layout last week
  - a few mod's made: finished today
  - should send out card beginning of next week


Status from Nevis: John Parsons
-----------------

o VME/SCL Interface
  - received from fab yesterday
  - being assembled (at Nevis) now - should finish tomorrow

o TAB
  - Submitted board last week (12-layer board)
  - Final checks being made while the order percolates through
    Columbia (end of next week)
  - Will buy 13 boards w/ 5 day turnaround
    . extra cost (over 2 boards) = ~$500
  - Will have to send out to assembler because of BGA's
    . 7-10 days for this
  - should have assembled board 4-5 weeks from now

o Cables and Connectors
  - Order for cables/connectors submitted
    . moving through Columbia



Discussion of the Summer Integration Test:
------------------------------------------

o See Integration Tests web page
  http://www.nevis.columbia.edu/~evans/l1cal/hardware/
       hardware.html#integration

o Timing of test
  - if shutdown is delayed by 3-4 weeks - could use this time for
    extra testing at labs
  - current plan: Denis comes to Fermilab around 16 Aug.
    . requires shipping ADF system to Fermilab 3rd week of July
  - TAB testing would benefit from a few more weeks at Nevis before
    coming to Fermilab
  - Will know more about status of ADF in ~1 month
    . will know if fabrication is going well at that time
    . some tests at Saclay need to be done before board can come to
      Fermilab 

o When to ask for power to the L1Cal Test Area
  - note: this involves cutting power to the MCH - so it has to be
    done during down time
  - originally scheduled for beginning of shutdown
    . shutdown date not clear
  - should ask for it to be done at the next possible opportunity
    . John Anderson needs 24 hours notice for this to happen
    . takes ~1/2 a shift


Any Other Business
------------------

o Run IIb Trigger Talk at Real Time Conference
  - no one found to give this
  - note: Denis is giving a talk on the L1Cal upgrade

o Director's Review of Run IIb project
  - emphasis on schedule, cost and progress
  - Hal will write talk for breakout sessions