RUN 2B L1CAL MEETING MINUTES
			     29 May, 2003

Present
o Fermilab:     G.Cancelo, J.Kotcher, V.Pavlicek, S.Rapisarda
o MSU:		
o Nevis:        H.Evans, J.Jin, C.Johnson, J.Mitrevski
o Northeastern: D.Wood
o Rice:         P.Padley
o Saclay:       


Director's Review: Jon Kotcher
-----------------
o The Director's Review has been postponed
  . Hal's talk now not necessary

o "D0 position paper"
  - response to accelerator plan
  - only course of action: have to make necessary upgrades to Tevatron
    to get enough luminosity to make Run IIb worthwhile
    . i.e. greater than the "baseline" on 6 fb-1

o Lab will (probably) ask us to pursue trigger upgrades regardless of
  what happens 
  - silicon may not continue though
  - need to fully understand the physics justification for this new
    scenario 


Status of the Data Pump: Stefano Rapisarda
-----------------------
o Split design into two parts
  - digital part
  - analog interface: use existing analog interface card

o Small demo card set up for digital part
  - based on Xilinx FPGA
  - will simplify preliminary tests

o Will use these for initial tests before final design
  - should be ready very soon
  - people should use this and give feedback


Status from Nevis: John Parsons
-----------------

o VME/SCL Interface
  - tested (successfully) as much as possible without TAB
  - this whole process took about 1.5 weeks - quite encouraging

o TAB
  - some problems with layout (related to via aspect ratio being right
    on the edge of spec) found by fabricator
  - Fixing this revealed bug in PADS software
    . layout checked (by hand) to be ok
    . Mentor Graphics now fixing this bug
  - Fabrication going forward - 5 day turnaround
    . should have board next week or early week after
  - Assembly should take 7 days
    . still on schedule for mid-June