RUN 2B L1CAL MEETING MINUTES 30-October-2003 PARTICIPANTS o Fermilab: S. Rapisarda, N. Wilcer, Ph. Laurens and briefly G. Cancelo o Columbia: J. Mitrevski o MSU: M. Abolins o Rice: P. Padley o Excused Non-Participants: H. Evans, D. Wood, Saclay AGENDA Minutes of 16-Oct-2003 ---------------------- o No comments PROGRESS REPORTS ---------------- 1. Test Waveform Generator (TWG): S. Rapisarda -------------------------------- Progress was reported on work on the TWG prototype. The Web page has been updated (http://www-ese.fnal.gov/D0Cal_TWG/) and work is progressing on the GUI on the software side. On the hardware input is needed from Dan Edmunds on maximum pulse height range expected at the input to the ADF card. Improvements in the speed of the current 40Mhz clock are being addressed and issues with SCL timing need to be sorted out. Philippe Laurens offered to check with Dean Schamberger on the pulse height issue and report back to the TWG group. Input on features of the final TWG design are solicited from all interested members of the collaboration. 2. Trigger Control Computer Software and Assignment of Responsibilities: P. Laurens ------------------------------------ To date, software work at MSU has consisted of familiarization with Linux system and software needed to control the new trigger system. There has been interaction with the TAB/GAB group (J. Mitrevski) to coordinate control software. Assignment of Responsibilities - Philippe reviewed his understanding of currently agreed-upon responsibilities University of Virginia (Bob Hirosky) would take charge of ADF firmware. The actual downloading may be under MSU control but, a clear understanding of that is not in place. Northeastern (D. Wood) would take care of creating and maintaining a data base of the ADF filter coefficients. These would be available to the TCC for download. MSU (Laurens) is in charge of the system level software that presents a common interface to the experiment. Columbia (J. Mitrevski) is responsible for TAB/GAB software and for coordination with Laurens. MSU will provide software for testing the production versions of the ADF card. UIC as agreed to be responsible for the cabling harnesses to connect the current BLS cables to the ADF cards. Paul Padley noted that there were lists of tasks generated by Hal Evans and Dan Edmunds and that it would be useful to have these tasks assigned to specific institutes in time for the Fermilab review on next Wednesday. He will send out copies of these lists to interested people for feedback. M. Abolins and P. Laurens agreed to return the list to Paul with best guesses of current assignments. 3. TAB/GAB: J. Mitrevski ---------- Loopback tests on LVDS link have run successfully with not parity errors up to 850 Mhz. The design value is 633 MHZ. At this lower value the TAB->GAB link was run for ~3 hours with no parity errors. Tests were performed in varying the relative GAB/TAB phase for the LVDS signals using eye patterns. Usable windows of 400 - 600 ps were measured at 633 Mhz. All of these tests have to be considered quite successful. The GAB board is approaching production status. Communication with Level2 Trigger has to be tested. There is one assembled TAB board and several other on hand that could be assembled. A minor hardware glitch is a misplaced screw hole which will require a screw to be inserted at an angle. 4. Management issues: P. Padley -------------------- The Fermilab review will take place next Wednesday. The trigger upgrade will probably not get much attention as the major focus is likely to be the Layer 0 silicon. Nevertheless, it is important that Darien, who will join by video, have a list of institutes covering all items on Hal and Dan’s task lists. 5. Saclay Status: E. Perez (by email) ---------------- * after some problems with the customs when we came back from Fnal (we had not done all the paperworks) we could finally retrieve the ADF & SCL distribution boards * the PCBs for the two test boards (board to test the Channel Link; single channel ADF board) arrived here; the boards should be done early november. * photos taken during the tests at Fnal are linked on our web page - also the excel plots showing the ADCs output when Stefano's board was sending data to the ADF. * we've had first contacts with UIC concerning the final version of the SCL distribution board.