RUN 2B L1CAL MEETING MINUTES
                   3 June, 2004

Present 
o Fermilab      T.Adams, H.Evans, J.Mitrevski, V.O'Dell, 
		G.Palowski, A.Stone, N.Varelas
o MSU           M.Abolins, J.Biel, P.Laurens
o Nevis         J.Parsons
o Northeastern	E.Barberis, D.Wood
o Rice		P.Padley
o Saclay        D.Calvet



Nevis: TAB/GAB (H.Evans)
--------------

o TAB/GAB prototype tests
  - TAB --> GAB transmission has run for >36 hours w/out error
  - have tested various pathological data patterns
  - starting first pass at coding of and/or terms in GAB
    . will allow tests of GAB-->TFW output
    . will take several weeks b/c involves updating some of the other
      TAB/GAB firmware 


Saclay: ADF/SCLD (D.Calvet)
----------------

o see slides linked off agenda

o Tests on Interim ADF board (2nd ADF board assembled at Saclay)
  - main changes wrt 1st ADF: added -5V, changed some resistors

o Pedestal can now be set correctly

o Noise measurements
  - improved over first prototype, but still above what is desired in
    final version
  - various levels of trigger-pickoff-like pulses input

o Digital Filter tested with various signal levels
  - noise largely filtered for low-level pulses by digital filter
  - results not too sensitive to coeff values

o ADC driver
  - have tried a new chip AD 8139
    . much smaller noise than THS 4141
    . also has much larger output swing using single (+5V) power
      supply 
    . this would be much easier than adding -5V: not VME standard
  - have mounted samples of AD 8139 on two channels of ADF
    . channel #14 behaves well but some problems with channel #10
    . tests not in optimal conditions - but seem to be better than
      before 
  - conclusion: AD 8139 seems to be a good option
    . may want to reconsider the choice of THS 4141

o Latency measurement
  - send raw ADC outputs (no digital filter)
    --> 400 ns from peak of analog input to MSB of data present at end
        of output cable
  - with digital filter
    --> latency 870 ns - 1230 ns (depending on digital filter coeff's)
  - difference wrt old prediction (2002) = 55 ns

o Power Consumption measured (see slides)
  - total power ~ 14 W

o Output tests using Channel Link Tester
  - BER < 3e-14 (at 95% CL)

o Denis needs to understand what changes MSU plan to make to his
  design so that he can target his documentation most efficiently
  - for example: SCLD signals have been simplified in ADF v2
    ==> SCLD firmware will have to be modified extensively
        but hardware should not need to modified
  - also ADF v1 and v2 are not electrically compatible


MSU: ADF (P.Laurens)
--------

o continuing ADF v2 design/layout/documentation



UIC: Cabling (A.Stone)
------------

o see slides linked off agenda

o BLS-to-ADF Transition cables
  - meeting b/w Alan, Dan, Marvin Johnson & John Anderson

o Main concerns
  - signal integrity / impedance match
  - connect low density BLS cables to high density ADF connections

o Recommendation
  - pleated foil cables (better impedance)
  - commercial "paddle cards" w/ ERNI connectors that connect to ADF
    backplane 

o Work already started on this


Northeastern: Simulation (E.Barberis)
------------------------

o Working on electron trigger simulation w/ Greg
  - in consultation w/ Volker and Marco

o Trigsim: starting discussion of putting L1Cal2b fully into trigsim

o Level-2
  - need to coordinate studies of this with L1 studies
  - have to decide whether current scheme of sending TT Et's to L2 is
    sufficient 

o Missing Et at L1 in Run IIa trigger
  - Greg is looking into this

o Possibility of calculating Ht quantities at L1
  - not in current design - but may be possible
  - need to study how much this buys us