RUN 2B L1CAL MEETING MINUTES
                   9 September, 2004

Present 
o Fermilab      T.Adams, M.Camuyrano, S.Lammers, A.Stone
o MSU           M.Abolins, J.Biehl, D.Edmunds, P.Laurens
o Nevis         H.Evans
o Northeastern  E.Barberis, D.Wood
o Saclay        D.Calvet



Nevis: TAB/GAB (H.Evans)
--------------

o GAB ECL Output Tests
  - simple test board back from fabrication - being assembled at Nevis
  - will use to test GAB to TFW outputs when firmware is ready

o Firmware
  - work continues on TAB/GAB firmware
  - particularly in setting up Altera test-bench for code

o Firmware for long-term ADF-to-TAB test
  - Jovan has been working on this
  - implementing Denis' scheme of pseudo-random number generation and
    event sync.

o TAB/GAB component ordering
  - orders for remaining TAB/GAB components now winding through
    Columbia purchasing 



MSU: ADF v2 (D.Edmunds)
-----------

o Continuing layout work on ADF v2
  - no major problems encountered

o Jason working on firmware, Philippe on software

o Orders
  - are pushing orders for parts through MSU purchasing
  - crate order: have communicated order to Wiener people, but have
    not placed an official order yet
    . order should be placed in next few days

o Meeting on cabling with Fermilab people and UIC
  - discussed components being built and installation process

o Talked with Stefano about TWG purchasing
  - order is now going forward, despite some initial delays

o Talked with people at Fermilab about best options for assembly
  - some good options identified


Saclay: (D.Calvet)
-------

o Working on paper/talk for Rome conference
  - need plot showing that splitter does not affect BLS data quality

o Channel Link receiver tester card (mezzanine card)
  - plugs onto commercial evaluation kit
  - connected to PC
  - used to test one output of ADF
  - hardware is complete
  - have nearly completed all associated firmware & software

o Can send out various ADF test hardware to Dan if desired
  - Wiener crate, Bit-3,...
  - Dan prefers that this remains at Saclay through ADF v2 testing

o 2nd SCLD will be assembled as soon as the 1st is tested with ADF v2
  - all components for this are available


UIC: Cabling (A.Stone)
------------

o Notes updated on web page

o Prototype layouts completed
  - patch panel card, paddle board
  - orders for PCBs (6 of each) placed now
  - note: already purchased 8+1 pleated-foil cables (4 ADFs)
  - boards will be stuffed at Fermilab

o Chasis
  - still working on this

o Mock-up of system
  - photos available on web
  - routed some scrap cable: 10' length (as planned) looks appropriate

o Meeting: Dan, Fermilab (Anderson, Fogelsong), UIC
  - reviewed design of cards ==> OK
  - racks: discussed cooling

o Plan for moving Run IIb racks into MCH
  - propose to reuse old racks - move new system piece by piece into MCH
  - Anderson will review this again after grounding studies done

o Rack parts
  - will order all parts for racks: monitoring, cooling, etc.

o Labeling BLS cables
  - will do this after ground short studies done
  - this will buy us time later on

o Test Stand
  - will be rearranging racks - will involved disconnecting some
    cables, but shouldn't cause major disruption


Simulation (S.Lammers)
----------

o Sliding Windows algo inserted into Trigger Rate Tool
  - found and fixed a few trivial bugs
  - should be basically working now

o A few technical questions
  - negative TT energies
    . will be dealt with in hardware by adding an offset to the ADF TT
      output (currently 0 GeV = 8 ADC counts is foreseen)
    . simulation does not yet include this offset
    . effects of this need to be studied
    . should do this after getting 1st-pass rate estimates with
      software as it is
  - applying a threshold to TT inputs from ADF
    . Jovan had shown a while ago that this could be helpful
    . no recent work has been done on this 
    . should be restarted as soon as 1st-pass rate studies are done

o Working on getting rates for trigger terms showed by Darien in July
  - will also study Atlas algorithm

o L3 Data
  - Todd has code that will do a hex dump of data
  - this will be the first step toward unpacking
  - GS crate address will be 0x10

o Electron Algorithm
  - studies of this algorithm continue to indicate that the Atlas
    algorithm is superior to the 2,1,1 algorithm