RUN 2B L1CAL MEETING MINUTES
                   13 January, 2005

Present 
o Fermilab      L.Bagby, G.Ginther, S.Lammers, M.Mulhearn, G.Pawloski, 
                S.Rapisarda, N.Varelas
o MSU           M.Abolins, J.Biehl, C.Brock, D.Edmunds, P.Laurens
o Nevis         H.Evans, C.Johnson
o Northeastern  E.Barberis, D.Wood
o Rice          P.Padley
o Saclay        D.Calvet



Nevis: TAB/GAB (H.Evans)
--------------

o All production TABs (10) and GABs (3) received from assembler
  - visual inspection ==> OK
  - no shorts found on boards
  - starting bench tests
    . all 10 TABs test OK after ~32K events each



MSU: ADF v2 (D.Edmunds)
-----------

o ADF v2 Boards testing status
  - have had cards for >1 week
  - VME interface works, can configure FPGAs
  - noise on data out of ADC's looks all right (from initial tests)
  - are now doing long term tests of analog sections
    . using TWG

o Next in line
  - Channel Link output
    . using Denis' test receiver

o Tests to do before signing off on production
  - channel link output is really the only thing
  - do more analog testing with TWG
  - after that board will be tested to its specs
  - MSU proposes that this be the trigger for th ADF PRR
    . which would then release the ADF for production



Test System
-----------

o Meeting yesterday about setting up the area
  - 4 racks foreseen
  - will start cleaning out the area
  - need maps of cards in crates to get going on this
  - goal is to get all infrastructure set up so that crates/cards can
    be put directly in when they arrive