Updated: 29-Apr-03
These modifications allow firmware to be downloaded to the Altera EPC2LC20 prom on the BC using a Jtag connection to the PCI-3 bus. Upon power-up this new code will then be loaded to the PCI-3 and Control FPGAs.
Connections that must be added to the BC
| Signal | Connector | EPC2 pin | Resistor |
| TDI | J2-5 | 11 (break connection to 3.3V) |
1 KOhm to 3.3V |
| TDO | J2-4 | 1 | none |
| TMS | J2-3 | 19 (break connection to 3.3V) |
1 KOhm to 3.3V |
| TCK | J1-1 | 3 (break connection to GND) |
1 KOhm to GND |
See Firmware page.