Input FPGA Trailer Word Format

This word is added by the input FPGA as an extra word at the end of the event data on each of its two channels separately.

Bits	Name	Description
Status
0	IDLE	Input Idle
1	EVENT
2	FLG_MISS_EV	Event Missed
3	FLG_END_EV	Last Word Flag
4	/AF	0 = FIFO almost full
5	/FULL	0 = FIFO full
6	TRUNCATE	Event Truncated
7	cnt_ovf=255	Word Counter Overflow
Word Count
8-15		Words in Event w/out Trailer (count from 1)
Event Count
16-23		Local Event Number
Data Source
24-31		Input Number (0-15)

Comments about Trailer Word contents;

Note 1: the associated fpga code is "slic_rec_hlk.tdf".
Note 2: RVS (Receiver Violation Symbol) errors do not show up in the trailer word. They an error counter that can be read serially from the fpga (see input serial commands).

Bits 0 and 1 (IDLE and EVENT); Idle and Event refer to the status of the hotlink receiver (as defined by the data it is receiving).
This is a snapshot of the moment that the trailer word is made.
IDLE: the hotlink receiver is between events (after end-of-event data flag, but before begin-of-event).
EVENT: the hotlink receiver is currently getting an event (after begin-of-event, but before end-of-event).
Under this definition, we should almost always be in the Idle state.

Receiver ERROR bit 2 (EVENT MISSED); Two consecutive END_EVENTs

Receiver ERROR bit 3 (LAST WORD FLAG); Two consecutive BEGIN_EVENTs

Bit 4, and Receiver ERROR bit 6 (EVENT TRUNCATED); Once the receiver FIFO surpasses the ~75%(?) capacity, the fpga goes into some "emergency mode"; (1) Bit 4 (FIFO ALMOST FULL) is set, and all data words are discarded. (2) The fpga only keeps track of event boundaries, and makes the appropriate trailer words, with bit 6 also set (truncation), to preserve event alignment.

Receiver ERROR Bit 5 (FIFO FULL); Sorry, you are dead and did not notice.

Bit 7 (OVERFLOW); Next channel is really a continuation of the present channel which reached 255 words.