Booting the DSP

The code used by the DSPs contains several modules, mostly written in c. They are all contained in a single executable. This is simpler and more compact than a scheme where a general operating system is used to load programs that perform specific analyses. It does mean, however, that different executables must be loaded to each DSP at boot time (because they perform different algorithms).

  1. Boot Initialization: This is the only part of the code written in linear assembly. It's purpose is to read in the initialized data sections from external memory so that execution of the main part of the code (which is written in c and uses initialized data) can begin. This is necessary because the DSP is configured to read one block of 64k bytes into program memory (from the FIFO) when it is released from reset.
  2. DSP Initialization: Sets up all components of the DSP for normal operations.
  3. Utilities: Contains functions for doing all I/O operations.
  4. Test Suite: A set of verification and testing functions accessible by VME commands to the DSP.
  5. Input Buffers: Functions for managing buffers where input data is stored.
  6. Algorithm: The algorithm that performs the physics task of this DSP.
The first four of these modules are the same for all DSPs. Input Buffers differ between DSPs 1-4 and DSP 5. The algorithm varies from DSP to DSP.

All code used by the DSPs is loaded at boot time as two files:
Section Where Address Range
Executable Program Memory 0x0000'0000 - 0x0000'4000
Data Data Memory 0x8000'0000 - 0x8000'0300
This memory map is set up in the command files hex_prog.cmd and hex_data.cmd used when making the boot executable. Note: the sizes of the executable and data sections will change as the program expands.

The process of booting the five DSPs on the SLIC boards is controlled by the driver code. The steps in the boot process are as follows. For full details of this process refer to the driver code (SlicDrive) and the boot code (boot36).

Step Driver Action DSP Action
1. Put DSP in reset  
2. Load exe sections of Boot Code to DSP FIFO  
3. Take DSP out of reset Load program
  1. DSP reads FIFO to program mem
    (under control of GAL chip)
  2. Jump to prog mem address 0 and begin execution
4. Load data sections of Boot Code to DSP FIFO Boot Initialization
  1. Init external memory (FIFO)
  2. Init Serial Port 0 for general purpose I/O
5. Handshake with Boot Code Handshake with Driver
6.   Read data sections to data mem
7.   Main boot sequence
  1. jump to main (_c_int00)
  2. Initialize External Memory (FIFO,SRAM)
  3. Initialize MCBSP 0 for general purpose I/O
  4. Initialize MCBSP 1 for serial data
    • I/O rate set to 80 MHz
  5. Initialize DMA Channels
    • No. 0 5x8-bit serial output
    • No. 1 32-bit data transfers (FIFO)
  6. Perform boot verification
  7. Jump to DSP Commands loop