TAB/GAB Event Data Memories

updated: 25-May-05

See the Serial Commands section of the Memory Mapping and Control webpage for details on accessing these memories and their formats.

Name	R/W	Written On	Description
TAB Chips 0-9
test	W	VME	Test TT data used to simulate ADF inputs
file	R	pulse	Copy of output to Chip 10
raw	R	accept	Copy of the L2/L3 data sent to sent to Chip 10 on an L1 accept
TAB Chip 10
test	W	VME	Test data used to simulate Sliding Windows chips outputs
gabfile	R	pulse	Copy of output to Chip 10
track	R	pulse	Copy of output to the Cal-Track Match sytem
GAB Input Chips 0-3
GAB S30 Chip

Notes:

1. The VME/SCL board's pulse signal is described in more detail here.
2. The VME/SCL board's accept signal (this is L1 Accept when the VME/SCL is getting inputs from the DØ SCL) is described in more detail here.