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Second Level Input Computer
What's New
- 16-Sep-02: Better description of input channel trailer word by Arthur Maciel.
- 31-Jan-02: The data routing has been changed to reflect the new L1 Qualifiers and MBT SCL information. See "Data Flow"
- 14-May-01: Arthur and Christos have come up with a draft for SLIC monitoring. See "Software"
- 25-Jan-01: A discussion of monitoring is now available. See "Software"
- 14-Nov-00: Pictures of the SLIC and DSP Daughterboard are now available. See "Slic Pic's".
SLIC Documentation
| Overview | Software | Data |
| VME | Hardware | Schematics |
| SLIC Overview | ||
| Overview | Document | 10-Aug-00 |
| SLIC Pic's | The Full SLIC | 14-Nov-00 |
| DSP Daughterboard | 14-Nov-00 | |
| Block Diagrams | SLIC | Oct-99 |
| DSP Communications | Apr-98 | |
| DSP (and other) Software | ||
| Archive | Code Repository | 09-Aug-00 |
| DSP OS | Boot | 11-Aug-00 |
| DSP commands | ||
| Handshaking | ||
| Memory Map | ||
| Input Data Buffers | Buffer Management | 04-Aug-00 |
| DSP-5 (Christos) | 26-Feb-01 | |
| Driver Code | Structure (prelim) | 28-Feb-01 |
| Initialization | Sequences (prelim) | 16-Aug-01 |
| Algorithms | Arthur's Algo page | |
| Event Sizes and Occ's | ||
| Monitoring | Constraints & Possibilities | 25-Jan-01 |
| DSP Monitoring | 14-May-01 | |
| Testing | Test Modes | 25-Jan-01 |
| Data Formats and Routing | ||
| Channel Maps | Input & Output | 09-Mar-99 |
| Internal Data Routing | Data Routing | 01-May-02 |
| DSP Output | 09-Aug-00 | |
| Internal Data Format | Hotlink Data Format | 09-Aug-00 |
| Input FPGA Trailer Word | 17-Sep-02 | |
| Link Data & Control | 01-May-02 | |
| DSP FPGA Stack Words | 10-Jan-00 | |
| L1 Qualifiers & the slic | 31-Jan-02 | |
| VME Communications | ||
| Memory | VME Addressing | 10-Apr-00 |
| Command Formats | Inp/Lnk/Out FPGAs | 06-Dec-99 |
| DSP FPGAs | 06-Dec-99 | |
| Commands | Write | 06-Dec-99 |
| Read | 06-Dec-99 | |
| Access to FPGAs |
DSP FPGAs: • Commands • Status/Control Register |
06-Dec-99 |
|
Input FPGAs: • Commands • Configuration |
10-Aug-00 | |
|
Link FPGAs: • Commands |
06-Dec-99 | |
|
Output FPGAs: • Commands • Configuration |
17-Mar-00 | |
| Hardware Information | ||
| FPGAs | Code | 09-Aug-00 |
| Initialization | 09-Aug-00 | |
| Hotlink | UMd page | |
| Speed | Transfer Rates & Clocks | 08-Aug-00 |
| Power | Power Usage | 09-Aug-00 |
| Chipsets | Partial chip list | 09-Aug-00 |
| Testing | Inventory | 24-Jan-01 |
| First SLIC/MBT Tests | 20-Oct-99 | |
| Schematics and Logic Diagrams | ||
| Input/Link | Chan | a| b| c| d| e| f| g| h| | 18-Jan-00 |
| Output | Output section | 15-Feb-00 |
| VME | VME Interface | 15-Feb-00 |
| Clocks | Clocks | 18-Jan-00 |
| Power | MB power | 18-Jan-00 |
| DSP | DSP Daughterboard | 16-Feb-00 |
| Connect to DSP DB | 18-Jan-00 | |
| DB power | 16-Feb-00 | |
| DB capacitors | 16-Feb-00 | |
| Logic Diagrams | obsolete | 24-Jun-99 |
Last updated: 09/17/02